Microsoft Unveils Maia 300 Chiplet Accelerator Built for AI Inference
Read the article: SiliconANGLE News
Microsoft has unveiled the Maia 300, its latest internally developed AI accelerator chip optimized for inference workloads. The company claims the chip processes 40% more tokens per megawatt than leading GPU-based systems and plans to make the Maia series its primary source of inference capacity over time. Production deployment is scheduled to begin next year.
The chip's architecture is built around four computing chiplets fabricated on TSMC's two-nanometer process, paired with 288 gigabytes of HBM4 memory. To address the data-movement bottlenecks that typically slow inference, Maia 300 uses an internal SRAM cache, proximity-based memory routing, and compressed data formats such as MXFP4. Microsoft says these design choices allow the chip to support larger models, longer context windows, and more simultaneous sessions within the same power envelope.
Microsoft plans to cluster Maia 300 chips into superpods of 12,288 accelerators connected via a custom Ethernet-based network. Racks of 96 accelerators are expected to deliver roughly seven times the token throughput of the previous-generation Maia 200. For legal professionals and institutions relying on cloud-based AI services, the deployment signals a significant infrastructure shift at one of the sector's largest AI providers.